ossicubesat
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| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| ossicubesat [2012/05/03 07:37] – donghee | ossicubesat [2018/07/18 14:10] (current) – external edit 127.0.0.1 | ||
|---|---|---|---|
| Line 53: | Line 53: | ||
| - 출력: PAYLOAD에 I2C로 메시지 보내기 | - 출력: PAYLOAD에 I2C로 메시지 보내기 | ||
| 1. 메시지 예약 삭제 | 1. 메시지 예약 삭제 | ||
| + | |||
| + | |||
| + | |||
| + | read button and led on | ||
| + | |||
| + | # | ||
| + | |||
| + | void main (void) | ||
| + | { | ||
| + | WDTCTL = WDTPW + WDTHOLD; | ||
| + | P6DIR |= BIT0; | ||
| + | P1OUT = BIT2; //pull up | ||
| + | |||
| + | while(1) | ||
| + | { | ||
| + | |||
| + | if((P6IN & BIT1) == 0) { // LOW? | ||
| + | P6OUT |= BIT0; | ||
| + | } else { | ||
| + | P6OUT &= ~BIT0; | ||
| + | } | ||
| + | } | ||
| + | } | ||
| #### LED: 모스코드 | #### LED: 모스코드 | ||
| Line 324: | Line 347: | ||
| ---- | ---- | ||
| port 1,2,3 이 가능 . | port 1,2,3 이 가능 . | ||
| + | |||
| + | |||
| Line 504: | Line 529: | ||
| Setting I2CEN = 0 has the following effects: | Setting I2CEN = 0 has the following effects: | ||
| + | |||
| - I2C communication stops | - I2C communication stops | ||
| - SDA and SCL are high impedance | - SDA and SCL are high impedance | ||
| Line 512: | Line 538: | ||
| - I2COA, I2CSA, I2CIE, I2CIFG, and I2CIV registers are unchanged | - I2COA, I2CSA, I2CIE, I2CIFG, and I2CIV registers are unchanged | ||
| - | + | When I2RM=1, I2CSTP must be set before the last I2CDR value is written. Othwerwise, correct STOP generation will not occur. | |
| - | *When I2RM=1, I2CSTP must be set before the last I2CDR value | + | |
| - | is written. Othwerwise, correct STOP generation will not occur. | + | |
| RXRDYIFG | RXRDYIFG | ||
| - | Receive ready interrupt/ | + | Receive ready interrupt/ |
| - | has received new data. RXRDYIFG is automatically cleared when | + | I2CDR is read and the receive buffer is empty. A receiver overrun is indicated if bit I2CRXOVR = 1. RXRDYIFG is used in receive mode |
| - | I2CDR is read and the receive buffer is empty. A receiver overrun is | + | |
| - | indicated if bit I2CRXOVR = 1. RXRDYIFG is used in receive mode | + | |
| only. | only. | ||
| TXRDYIFG | TXRDYIFG | ||
| - | Transmit ready interrupt/ | + | Transmit ready interrupt/ |
| - | is ready for new transmit data (master transmit mode) or when | + | another master is requesting data (slave transmit mode). TXRDYIFG is automatically cleared when I2CDR and the transmit buffer are full. |
| - | another master is requesting data (slave transmit mode). TXRDYIFG | + | A transmit underflow is indicated if I2CTXUDF = 1. Unused in receive mode. |
| - | is automatically cleared when I2CDR and the transmit buffer are full. | + | |
| - | A transmit underflow is indicated if I2CTXUDF = 1. Unused in receive | + | |
| - | mode. | + | |
| eeprom | eeprom | ||
| Line 1013: | Line 1032: | ||
| } | } | ||
| } | } | ||
| + | |||
| + | eeprom to uart tx | ||
| + | |||
| + | // | ||
| + | // MSP-FET430P140 Demo - USART0, Ultra-Low Pwr UART 9600 Echo ISR, 32kHz ACLK | ||
| + | // | ||
| + | // Description: | ||
| + | // is made ready to receive one character with interrupt active. The Mainloop | ||
| + | // waits in LPM3. The UART0 ISR forces the Mainloop to exit LPM3 after | ||
| + | // receiving one character which echo's back the received character. | ||
| + | // ACLK = UCLK0 = LFXT1 = 32768, MCLK = SMCLK = DCO~ 800k | ||
| + | // Baud rate divider with 32768hz XTAL @9600 = 32768Hz/ | ||
| + | // //* An external watch crystal is required on XIN XOUT for ACLK *// | ||
| + | // | ||
| + | // MSP430F149 | ||
| + | // ----------------- | ||
| + | // /|\| XIN|- | ||
| + | // | | | 32kHz | ||
| + | // | ||
| + | // | ||
| + | // | ||
| + | // | ||
| + | // | ||
| + | // | ||
| + | // | ||
| + | // M. Buccini | ||
| + | // Texas Instruments Inc. | ||
| + | // Feb 2005 | ||
| + | // Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.21A | ||
| + | // | ||
| + | |||
| + | # | ||
| + | #include " | ||
| + | #include " | ||
| + | |||
| + | unsigned char message[255]; | ||
| + | int step = 36; | ||
| + | |||
| + | void initUart() | ||
| + | { | ||
| + | P3SEL |= 0x30; // P3.4,5 = USART0 TXD/RXD | ||
| + | ME1 |= UTXE0 + URXE0; | ||
| + | UCTL0 |= CHAR; // 8-bit character | ||
| + | UTCTL0 |= SSEL0; | ||
| + | UBR00 = 0x03; // 32k/9600 - 3.41 | ||
| + | UBR10 = 0x00; // | ||
| + | UMCTL0 = 0x4A; // Modulation | ||
| + | UCTL0 &= ~SWRST; | ||
| + | IE1 |= URXIE0; | ||
| + | |||
| + | } | ||
| + | |||
| + | void main(void) | ||
| + | { | ||
| + | volatile unsigned int i; | ||
| + | |||
| + | WDTCTL = WDTPW + WDTHOLD; | ||
| + | initUart(); | ||
| + | _EINT(); | ||
| + | |||
| + | |||
| + | U0CTL &= ~CHAR; | ||
| + | InitI2C(); | ||
| + | |||
| + | for(i=0; i < step;i++ ) { | ||
| + | message[i]= EEPROM_RandomRead(i); | ||
| + | // ascii(x); | ||
| + | } | ||
| + | |||
| + | U0CTL &= ~I2C; //Clear I2C, SYNC, and I2CEN (CLR.B | ||
| + | U0CTL &= ~SYNC; | ||
| + | U0CTL &= ~I2CEN; | ||
| + | U0CTL |= SWRST; | ||
| + | |||
| + | initUart(); | ||
| + | // Mainloop | ||
| + | for (;;) | ||
| + | { | ||
| + | _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/interrupt | ||
| + | for(i=0; i< step; i++) { | ||
| + | while (!(IFG1 & UTXIFG0)); | ||
| + | TXBUF0 = message[i]; | ||
| + | } | ||
| + | } | ||
| + | } | ||
| + | |||
| + | // UART0 RX ISR will for exit from LPM3 in Mainloop | ||
| + | #pragma vector=USART0RX_VECTOR | ||
| + | __interrupt void usart0_rx (void) | ||
| + | { | ||
| + | _BIC_SR_IRQ(LPM3_bits); | ||
| + | } | ||
| + | |||
| #### SPI | #### SPI | ||
| Line 1041: | Line 1153: | ||
| #### RTC | #### RTC | ||
| Software Realtime Clock | Software Realtime Clock | ||
| - | http:// | + | http:// |
| + | |||
| + | |||
| + | #### 7020-1 | ||
| + | |||
| + | uart to 7020 | ||
| + | |||
| + | main.c | ||
| + | |||
| + | # | ||
| + | #include " | ||
| + | #include " | ||
| + | |||
| + | char message[255]; | ||
| + | char _message[255] = {' | ||
| + | |||
| + | uint8_t step = 0; | ||
| + | uint8_t sending = 0; | ||
| + | |||
| + | void initUart() { | ||
| + | P3SEL |= 0x30; // P3.4,5 = USART0 TXD/RXD | ||
| + | ME1|= UTXE0 + URXE0; | ||
| + | UCTL0 |= CHAR; // 8-bit character | ||
| + | UTCTL0 |= SSEL0; | ||
| + | UBR00 = 0x03; // 32k/9600 - 3.41 | ||
| + | UBR10 = 0x00; // | ||
| + | UMCTL0 = 0x4A; // Modulation | ||
| + | UCTL0 &= ~SWRST; | ||
| + | IE1 |= URXIE0; | ||
| + | } | ||
| + | |||
| + | void main(void) | ||
| + | { | ||
| + | volatile unsigned int i; | ||
| + | volatile unsigned char x; | ||
| + | WDTCTL = WDTPW + WDTHOLD; | ||
| + | P6DIR |= 0x01; | ||
| + | initUart(); | ||
| + | initRF(); | ||
| + | // // _BIS_SR(LPM0_bits + GIE); // Enter LPM3 w/ interrupt | ||
| + | |||
| + | _EINT(); | ||
| + | // | ||
| + | step = 10; | ||
| + | | ||
| + | |||
| + | | ||
| + | | ||
| + | ascii(_message[i]); | ||
| + | } | ||
| + | } | ||
| + | while (1) { | ||
| + | if (sending == 1) { | ||
| + | UCTL0 &= ~CHAR; | ||
| + | |||
| + | InitI2C(); | ||
| + | |||
| + | for(i=0; i < step-1;i++ ) { | ||
| + | x= EEPROM_ByteWrite(i, | ||
| + | EEPROM_AckPolling(); | ||
| + | } | ||
| + | |||
| + | for(i=0; i < step-1;i++ ) { | ||
| + | x = EEPROM_RandomRead(i); | ||
| + | ascii(x); | ||
| + | } | ||
| + | step=0; | ||
| + | sending=0; | ||
| + | |||
| + | // | ||
| + | UCTL0 &= ~I2C; //Clear I2C, SYNC, and I2CEN (CLR.B | ||
| + | UCTL0 &= ~SYNC; | ||
| + | UCTL0 &= ~I2CEN; | ||
| + | |||
| + | UCTL0 |= SWRST; | ||
| + | |||
| + | initUart(); | ||
| + | } | ||
| + | } | ||
| + | } | ||
| + | |||
| + | #pragma vector=USART0RX_VECTOR | ||
| + | __interrupt void usart0_rx (void) | ||
| + | { | ||
| + | |||
| + | while (!(IFG1 & UTXIFG0)); | ||
| + | TXBUF0 = RXBUF0; | ||
| + | message[step] = RXBUF0; | ||
| + | |||
| + | _EINT(); | ||
| + | |||
| + | step++; | ||
| + | if (RXBUF0 == 13) // CR | ||
| + | { | ||
| + | //P6OUT ^= 0x01; | ||
| + | sending = 1; | ||
| + | } | ||
| + | } | ||
| + | |||
| + | rc.c | ||
| + | |||
| + | # | ||
| + | |||
| + | unsigned char r0[4] = {0x71, 0x39, 0x33,0xa0}; //433Mhz | ||
| + | unsigned char r1[3] = {0x02, 0x90, 0x11}; | ||
| + | unsigned char r2[4] = {0x80, 0x0f, 0x00, 0xd2}; | ||
| + | unsigned char r2_high[4] = {0x80, 0x0f, 0x7e, 0xd2}; | ||
| + | |||
| + | void adf702x_write_register(unsigned char r) | ||
| + | { | ||
| + | volatile int i; | ||
| + | |||
| + | for(i = 7; i >= 0; i--) | ||
| + | { | ||
| + | // _ | ||
| + | P5OUT &= ~BIT1; | ||
| + | if(r & (1<< | ||
| + | P5OUT |= BIT3; | ||
| + | } else { | ||
| + | P5OUT &= ~BIT3; | ||
| + | } | ||
| + | __delay_cycles(30); | ||
| + | |||
| + | // _|- | ||
| + | P5OUT |= BIT1; // high | ||
| + | //P5OUT |= BIT3; | ||
| + | __delay_cycles(30); | ||
| + | } | ||
| + | |||
| + | //_|-| | ||
| + | P5OUT &= ~BIT1; | ||
| + | // | ||
| + | |||
| + | } | ||
| + | |||
| + | void adf702x_write_r0() | ||
| + | { | ||
| + | volatile int i; | ||
| + | |||
| + | //P5OUT &= ~BIT3; | ||
| + | |||
| + | for(i=0; | ||
| + | { | ||
| + | adf702x_write_register(r0[i]); | ||
| + | } | ||
| + | |||
| + | P5OUT |= BIT4; // high | ||
| + | __delay_cycles(60); | ||
| + | P5OUT &= ~BIT4; | ||
| + | //P5OUT &= ~BIT3; | ||
| + | } | ||
| + | |||
| + | void adf702x_write_r1() | ||
| + | { | ||
| + | volatile int i; | ||
| + | |||
| + | for(i=0; | ||
| + | { | ||
| + | adf702x_write_register(r1[i]); | ||
| + | } | ||
| + | |||
| + | P5OUT |= BIT4; // high | ||
| + | __delay_cycles(60); | ||
| + | P5OUT &= ~BIT4; | ||
| + | |||
| + | } | ||
| + | |||
| + | void adf702x_write_r2(int isHigh) | ||
| + | { | ||
| + | volatile int i; | ||
| + | |||
| + | //P5OUT &= ~BIT3; | ||
| + | |||
| + | if (isHigh == 0) { | ||
| + | for(i=0; | ||
| + | { | ||
| + | adf702x_write_register(r2[i]); | ||
| + | } | ||
| + | }else { | ||
| + | for(i=0; | ||
| + | { | ||
| + | adf702x_write_register(r2_high[i]); | ||
| + | } | ||
| + | } | ||
| + | |||
| + | P5OUT |= BIT4; // SLE high_low | ||
| + | __delay_cycles(60); | ||
| + | P5OUT &= ~BIT4; | ||
| + | |||
| + | //P5OUT &= ~BIT3; | ||
| + | } | ||
| + | |||
| + | void initRF() | ||
| + | { | ||
| + | // DATA I/I is 5.0 | ||
| + | // | ||
| + | // | ||
| + | //SLE PIN is 5.4 | ||
| + | // CE PIN is 5.5 | ||
| + | P5DIR |= BIT0 + BIT1 + BIT3 + BIT4 + BIT5; | ||
| + | P5OUT |= BIT5; // CE is HIGH | ||
| + | |||
| + | P5OUT |= BIT0; // DATA is HIGH | ||
| + | |||
| + | adf702x_write_r0(); | ||
| + | // | ||
| + | adf702x_write_r1(); | ||
| + | // | ||
| + | adf702x_write_r2(1); | ||
| + | // | ||
| + | adf702x_write_r2(0); | ||
| + | } | ||
| + | |||
| + | |||
| + | |||
| + | morse.c | ||
| + | |||
| + | #include " | ||
| + | #include " | ||
| + | |||
| + | //uint8_t done = 0b10000000; | ||
| + | uint8_t done = 0x80; | ||
| + | |||
| + | uint8_t output_pin; | ||
| + | |||
| + | void delay(void) | ||
| + | { | ||
| + | volatile unsigned int i; | ||
| + | i = 10000; | ||
| + | do (i--); | ||
| + | while (i != 0); | ||
| + | } | ||
| + | |||
| + | void mark(uint8_t t) | ||
| + | { | ||
| + | volatile unsigned int i; | ||
| + | // P5OUT |= BIT0; | ||
| + | adf702x_write_r2(1); | ||
| + | P6OUT &= ~0x01; | ||
| + | for(i = 0; i < t; i++) | ||
| + | { // Turn On | ||
| + | delay(); | ||
| + | } | ||
| + | // P5OUT &= ~BIT0; | ||
| + | adf702x_write_r2(0); | ||
| + | P6OUT |= 0x01; // Turn Off | ||
| + | delay(); | ||
| + | } | ||
| + | |||
| + | void space(uint8_t t) | ||
| + | { | ||
| + | volatile unsigned int i; | ||
| + | // P5OUT &= ~BIT0; | ||
| + | adf702x_write_r2(0); | ||
| + | P6OUT |= 0x01; | ||
| + | |||
| + | for(i = 0; i < t; i++) | ||
| + | { | ||
| + | delay(); | ||
| + | } | ||
| + | } | ||
| + | |||
| + | void morse(uint8_t m) | ||
| + | { | ||
| + | while (m != done) { | ||
| + | | ||
| + | | ||
| + | } | ||
| + | space(3); | ||
| + | } | ||
| + | |||
| + | |||
| + | void ascii(char c) { | ||
| + | |||
| + | uint8_t number_code[] = { | ||
| + | // 0b11111100, | ||
| + | // 0b10000100, | ||
| + | 0xfc, 0x7c, 0x3c, 0x1c, 0xc, 0x4, 0x84, 0xc4, 0xe4, 0xf4 | ||
| + | }; | ||
| + | |||
| + | uint8_t alphabet_code[] = { | ||
| + | // | ||
| + | // | ||
| + | // | ||
| + | // | ||
| + | // | ||
| + | 0x60, 0x88, 0xa8, 0x90, 0x40, 0x28, 0xd0, 0x8, 0x20, 0x78, 0xb0, 0x48, 0xe0, 0xa0, 0xf0, 0x68, 0xd8, 0x50, 0x10, 0xc0, 0x30, 0x18, 0x70, 0x98, 0xb8, 0xc8 | ||
| + | }; | ||
| + | |||
| + | if (c >= ' | ||
| + | morse(number_code[c- ' | ||
| + | } else if (c >= ' | ||
| + | morse(alphabet_code[c - ' | ||
| + | } else if (c == ' ') { | ||
| + | space(7); | ||
| + | } else { | ||
| + | morse(done); | ||
| + | } | ||
| + | } | ||
| + | |||
| + | ====== 7021-n ====== | ||
| + | |||
| + | 4k일때는 잘되는것 같은데, 9.6k 일때 핀 인터럽트가 밀리는것 같다. | ||
| + | |||
| + | # | ||
| + | #include " | ||
| + | #include " | ||
| + | |||
| + | char message[255]; | ||
| + | //char _message[255] = {' | ||
| + | |||
| + | char _message[255] = {' | ||
| + | |||
| + | uint8_t step = 0; | ||
| + | uint8_t sending = 0; | ||
| + | int i =7; | ||
| + | int m =0; | ||
| + | |||
| + | void initUart() { | ||
| + | P3SEL |= 0x30; // P3.4,5 = USART0 TXD/RXD | ||
| + | ME1|= UTXE0 + URXE0; | ||
| + | UCTL0 |= CHAR; // 8-bit character | ||
| + | UTCTL0 |= SSEL0; | ||
| + | UBR00 = 0x03; // 32k/9600 - 3.41 | ||
| + | UBR10 = 0x00; // | ||
| + | UMCTL0 = 0x4A; // Modulation | ||
| + | UCTL0 &= ~SWRST; | ||
| + | IE1 |= URXIE0; | ||
| + | } | ||
| + | |||
| + | void init_txrx_interrupt() | ||
| + | { | ||
| + | P1OUT = BIT2; //pull up | ||
| + | P1IE |= BIT2; // interrupt enable | ||
| + | P1IES |= BIT2; // interrupt hi/lo falling edge | ||
| + | //P1IES &= ~BIT2; // interrupt lo/hi edge | ||
| + | P1IFG &= ~BIT2; // P1.2 IFG cleared just in case | ||
| + | |||
| + | P5DIR |= BIT0; | ||
| + | |||
| + | _EINT(); | ||
| + | } | ||
| + | |||
| + | void main(void) | ||
| + | { | ||
| + | volatile unsigned int i; | ||
| + | volatile unsigned char x; | ||
| + | WDTCTL = WDTPW + WDTHOLD; | ||
| + | P6DIR |= 0x01; | ||
| + | initUart(); | ||
| + | init7021_n(); | ||
| + | init_txrx_interrupt(); | ||
| + | |||
| + | // // _BIS_SR(LPM0_bits + GIE); // Enter LPM3 w/ interrupt | ||
| + | |||
| + | _EINT(); | ||
| + | // | ||
| + | step = 10; | ||
| + | | ||
| + | |||
| + | // | ||
| + | // | ||
| + | // ascii(_message[i]); | ||
| + | // } | ||
| + | // } | ||
| + | |||
| + | while (1) { | ||
| + | if (sending == 1) { | ||
| + | UCTL0 &= ~CHAR; | ||
| + | |||
| + | InitI2C(); | ||
| + | |||
| + | for(i=0; i < step-1;i++ ) { | ||
| + | x= EEPROM_ByteWrite(i, | ||
| + | EEPROM_AckPolling(); | ||
| + | } | ||
| + | |||
| + | for(i=0; i < step-1;i++ ) { | ||
| + | x = EEPROM_RandomRead(i); | ||
| + | ascii(x); | ||
| + | } | ||
| + | step=0; | ||
| + | sending=0; | ||
| + | |||
| + | // | ||
| + | UCTL0 &= ~I2C; //Clear I2C, SYNC, and I2CEN (CLR.B | ||
| + | UCTL0 &= ~SYNC; | ||
| + | UCTL0 &= ~I2CEN; | ||
| + | |||
| + | UCTL0 |= SWRST; | ||
| + | |||
| + | initUart(); | ||
| + | } | ||
| + | } | ||
| + | } | ||
| + | |||
| + | #pragma vector=USART0RX_VECTOR | ||
| + | __interrupt void usart0_rx (void) | ||
| + | { | ||
| + | |||
| + | while (!(IFG1 & UTXIFG0)); | ||
| + | TXBUF0 = RXBUF0; | ||
| + | message[step] = RXBUF0; | ||
| + | |||
| + | _EINT(); | ||
| + | |||
| + | step++; | ||
| + | if (RXBUF0 == 13) // CR | ||
| + | { | ||
| + | //P6OUT ^= 0x01; | ||
| + | sending = 1; | ||
| + | } | ||
| + | } | ||
| + | |||
| + | // Port 1 interrupt service routine | ||
| + | #pragma vector=PORT1_VECTOR | ||
| + | __interrupt void Port_1(void) | ||
| + | { | ||
| + | //P6OUT ^= BIT0; // Toggle LED at P6.0 | ||
| + | //P5OUT ^= BIT0; // Toggle LED at P5.0 | ||
| + | |||
| + | if(_message[m] & (1<< | ||
| + | P5OUT |= BIT0; | ||
| + | } else { | ||
| + | P5OUT &= ~BIT0; | ||
| + | } | ||
| + | |||
| + | i--; | ||
| + | |||
| + | if (i < 0){i = 7;m++;}; | ||
| + | if (m >= 12){m = 0; }; | ||
| + | |||
| + | P1IFG &= ~BIT2; // P1.2 IFG cleared | ||
| + | } | ||
| + | |||
| + | |||
| + | |||
| + | ##### Transfer Frames Format | ||
| + | |||
| + | AX.25 | ||
| + | |||
| + | |||
| + | 할일 | ||
| + | |||
| + | - Callsign 받기 | ||
| + | |||
| + | |||
| + | |||
| + | ##### I2C msp430 communication | ||
| + | |||
| + | |||
| + | master | ||
| + | |||
| + | led 6.0 | ||
| + | button 6.1 | ||
| + | |||
| + | # | ||
| + | void delay (void); | ||
| + | char TXData = 0; | ||
| + | |||
| + | void main (void) | ||
| + | { | ||
| + | WDTCTL = WDTPW + WDTHOLD; | ||
| + | |||
| + | P3SEL |= 0x0A; // Select I2C pins | ||
| + | U0CTL |= I2C + SYNC; // Recommended init procedure | ||
| + | U0CTL &= ~I2CEN; | ||
| + | I2CTCTL |= I2CSSEL1 + I2CTRX; | ||
| + | I2CNDAT = 0x03; // Write Three bytes | ||
| + | I2CSA = 0x0048; | ||
| + | U0CTL |= I2CEN; | ||
| + | |||
| + | U0CTL |= MST; // Master mode | ||
| + | I2CTCTL |= I2CSTT + I2CSTP; | ||
| + | while ((I2CIFG & TXRDYIFG) == 0); // Wait for transmitter to be ready | ||
| + | I2CDRB = TXData; | ||
| + | while ((I2CIFG & TXRDYIFG) == 0); // Wait for transmitter to be ready | ||
| + | I2CDRB = TXData; | ||
| + | while ((I2CIFG & TXRDYIFG) == 0); // Wait for transmitter to be ready | ||
| + | |||
| + | while(1) | ||
| + | { | ||
| + | |||
| + | if((P6IN & BIT1) == 0) { // LOW? | ||
| + | I2CDRB = 1; | ||
| + | P6OUT |= BIT0; | ||
| + | } | ||
| + | } | ||
| + | } | ||
| + | |||
| + | |||
| + | slave | ||
| + | |||
| + | # | ||
| + | |||
| + | char RXData = 0; | ||
| + | |||
| + | void main (void) | ||
| + | { | ||
| + | WDTCTL = WDTPW + WDTHOLD; | ||
| + | P6DIR |= BIT0; | ||
| + | P6OUT &= ~BIT0; | ||
| + | |||
| + | P3SEL |= 0x0A; // Select I2C pins | ||
| + | U0CTL |= I2C + SYNC; // Recommended init procedure | ||
| + | U0CTL &= ~I2CEN; | ||
| + | I2CTCTL |= I2CSSEL1; | ||
| + | I2COA = 0x0048; | ||
| + | I2CIE = RXRDYIE; | ||
| + | U0CTL |= I2CEN; | ||
| + | |||
| + | _BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupt | ||
| + | while(1){ | ||
| + | if (RXData !=0) | ||
| + | P6OUT |= BIT0; | ||
| + | else | ||
| + | P6OUT &= ~BIT0; | ||
| + | } | ||
| + | } | ||
| + | |||
| + | |||
| + | // Common ISR for I2C Module | ||
| + | #pragma vector=USART0TX_VECTOR | ||
| + | __interrupt void I2C_ISR(void) | ||
| + | { | ||
| + | switch( I2CIV ) | ||
| + | { | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | case 10: // Receive Ready | ||
| + | RXData = I2CDRB; | ||
| + | | ||
| + | | ||
| + | case 12: break; | ||
| + | case 14: break; | ||
| + | case 16: break; | ||
| + | } | ||
| + | } | ||
| + | |||
| + | |||
| + | |||
| + | |||
| + | |||
| + | #### msp430 blink assembly | ||
| + | |||
| + | blink | ||
| + | |||
| + | ; | ||
| + | ; | ||
| + | ; | ||
| + | ; | ||
| + | ; ACLK = n/a, MCLK = SMCLK = default DCO ~ 800k | ||
| + | ; | ||
| + | ; MSP430x1xx | ||
| + | ; | ||
| + | ; / | ||
| + | ; | | | | ||
| + | ; --|RST | ||
| + | ; | | | ||
| + | ; | | ||
| + | ; | ||
| + | ; | ||
| + | ; Texas Instruments, | ||
| + | ; | ||
| + | ; Built with CCE for MSP430 Version: 1.00 | ||
| + | ; | ||
| + | .cdecls C, | ||
| + | |||
| + | ; | ||
| + | .text ; Progam Start | ||
| + | ; | ||
| + | RESET | ||
| + | StopWDT | ||
| + | SetupP1 | ||
| + | ; | ||
| + | Mainloop | ||
| + | Wait mov.w # | ||
| + | L1 dec.w | ||
| + | jnz | ||
| + | jmp | ||
| + | ; | ||
| + | ; | ||
| + | ; | ||
| + | ; | ||
| + | .sect " | ||
| + | .short | ||
| + | |||
| + | .end | ||
| + | |||
| + | |||
| + | |||
| + | |||
| + | |||
| + | </ | ||
ossicubesat.1336030634.txt.gz · Last modified: 2018/07/18 14:09 (external edit)